General Description
The Evaluation Board demonstrates the RTQ6340GQW to be designed for a 5V/0.5A output from a 8V to 42V input at 500kHz switching frequency. The wide input range makes it suitable for communications and industrial 12V, 24V and 36V power systems. The RTQ6340GQW provides complete protection functions such as input undervoltage lockout, output undervoltage protection, overcurrent protection and thermal shut down. Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start-up.
Performance Sepcification Summary
Summary of the RTQ6340GQW Evaluation Board performance specificiaiton is provided in Table 1. The ambient temperature is 25°C.
Table 1. RTQ6340GQW Evaluation Board Performance Specification Summary
Specification
|
Test Conditions
|
Min
|
Typ
|
Max
|
Unit
|
Input Voltage Range
|
|
8
|
--
|
42
|
V
|
Output Current
|
|
0
|
--
|
0.5
|
A
|
Default Output Voltage
|
|
--
|
5
|
--
|
V
|
Operation Frequency
|
|
--
|
500
|
--
|
kHz
|
Output Ripple Voltage
|
IOUT = 0.5A
|
--
|
10
|
--
|
mVp-p
|
Line Regulation
|
IOUT = 0.5A, VIN = 8V to 42V
|
--
|
±1
|
--
|
%
|
Load Regulation
|
VIN = 12V, IOUT = 0.001A to 0.5A
|
--
|
±1
|
--
|
%
|
Load Transient Response
|
IOUT = 0.25A to 0.5A
|
--
|
±5
|
--
|
%
|
Maximum Efficiency
|
VIN = 12V, VOUT = 5V, IOUT = 0.5A
|
--
|
90.9
|
--
|
%
|
Power-up Procedure
Suggestion Required Equipments
- RTQ6340GQW Evaluation Board
- DC power supply capable of at least 42V and 1A
- Electronic load capable of 6A
- Function Generator
- Oscilloscope
Quick Start Procedures
The Evaluation Board is fully assembled and tested. Follow the steps below to verify board operation. Do not turn on supplies until all connections are made. When measuring the output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the output voltage ripple by touching the probe tip and ground ring directly across the last output capacitor.
Proper measurement equipment setup and follow the procedure below.
1) With power off, connect the input power supply to VIN and GND pins.
2) With power off, connect the electronic load between the VOUT and nearest GND pins.
3) Turn on the power supply at the input. Make sure that the input voltage does not exceeds 42V on the Evaluation Board.
4) Check for the proper output voltage using a voltmeter.
5) Once the proper output voltage is established, adjust the load within the operating ranges and observe the output voltage regulation, ripple voltage, efficiency and other performance.
Detailed Description of Hardware
Headers Description and Placement
Carefully inspect all the components used in the EVB according to the following Bill of Materials table, and then make sure all the components are undamaged and correctly installed. If there is any missing or damaged component, which may occur during transportation, please contact our distributors or e-mail us at evb_service@richtek.com.
Test Points
The EVB is provided with the test points and pin names listed in the table below.
Test Point/
Pin Name
|
Function
|
VIN
|
Input voltage.
|
VOUT
|
Output voltage.
|
GND
|
Ground.
|
EN
|
Enable test point.
|
J3
|
EN jumper. Connect EN to ground to disable, open to enable.
|
SW
|
Switch node test point.
|
V2
|
Test pin V2 is used for bode plot measurement. Connect VOUT pin and this pin to the injection transformer.
|
SS/TR
|
Soft-start and tracking test point.
|
VPG_Ext
|
Test point for pull up voltage of the Open-drain power-good indication output.
|
PGOOD
|
Power-good indication test point.
|
Bill of Materials
VIN = 12V, VOUT = 5.0V, IOUT = 0.5A, fSW = 500kHz
|
Reference
|
Count
|
Part Number
|
Value
|
Description
|
Package
|
Manufacturer
|
U1
|
1
|
RTQ6340GQW
|
RTQ6340GQW
|
Step-Down Converter
|
WDFN-10SL 3x3
|
RICHTEK
|
C3, C4
|
2
|
HMK316AC7225KLHTE
|
2.2µF
|
Capacitor, Ceramic, 100V, X7R
|
1206
|
Taiyo Yuden
|
C5
|
1
|
0603B182K500CT
|
1.8nF
|
Capacitor, Ceramic, 50V, X7R
|
0603
|
WALSIN
|
C6
|
1
|
0603N100J500CT
|
10pF
|
Capacitor, Ceramic, 50V, NPO
|
0603
|
WALSIN
|
C7
|
1
|
GRM32ER61C476KE15L
|
47µF
|
Capacitor, Ceramic, 16V, X5R
|
1210
|
MURATA
|
C11
|
1
|
0603B104K500CT
|
0.1µF
|
Capacitor, Ceramic, 50V, X7R
|
0603
|
WALSIN
|
CBOOT
|
1
|
0603B104K500CT
|
0.1µF
|
Capacitor, Ceramic, 50V, X7R
|
0603
|
WALSIN
|
CSS
|
1
|
0603B103K500CT
|
10nF
|
Capacitor, Ceramic, 50V, X7R
|
0603
|
WALSIN
|
D1
|
1
|
VS-10BQ060-M3
|
60V/1A
|
Schottky Diode
|
SMB
|
VISHAY
|
L1
|
1
|
744777147
|
47µH
|
Inductor, Isat = 1.1A, 170mΩ
|
--
|
WURTH ELEKTRONIK
|
R1
|
1
|
WR06X5232FTL
|
52.3k
|
Resistor, Chip, 1/10W, 1%
|
0603
|
WALSIN
|
R2, R8
|
2
|
WR06X1002FTL
|
10k
|
Resistor, Chip, 1/10W, 1%
|
0603
|
WALSIN
|
R3
|
1
|
RTT031693FTP
|
169k
|
Resistor, Chip, 1/10W, 1%
|
0603
|
RALEC
|
R7, RBOOT
|
2
|
WR06X000 PTL
|
0
|
Resistor, Chip, 1/10W, 1%
|
0603
|
WALSIN
|
RT
|
1
|
RTT032323FTP
|
232k
|
Resistor, Chip, 1/10W, 1%
|
0603
|
RALEC
|
Typical Applications
EVB Schematic Diagram
1. The capacitance values of the input and output capacitors will influence the input and output voltage ripple.
2. MLCC capacitors have degrading capacitance at DC bias voltage, and especially smaller size MLCC capacitors will have much lower capacitance.
Measure Result
Output Ripple Measurement
|
Load Transient Response
|
|
|
Power On from EN
|
Power Off from EN
|
|
|
Short Circuit Response – Short and Recovery
|
Start-Up Dropout Performance
|
|
|
Efficiency vs. Output Current
|
Output Voltage vs. Output Current
|
|
|
Output Voltage vs. Input Voltage
|
Loop Response
|
|
|
Thermal Image at VIN = 12V, VOUT = 5V, IOUT = 0.5A
|
|
Note: When measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the output voltage ripple by touching the probe tip directly across the output capacitor.
Evaluation Board Layout
Figure 1 to Figure 4 are RTQ6340GQW Evaluation Board layout. This board size is 70mm x 50mm and is constructed on four-layer PCB, outer layers with 2 oz. Cu and inner layers with 1 oz. Cu.
Figure 1. Top View (1st layer)
Figure 2. PCB Layout—Inner Side (2nd Layer)
Figure 3. PCB Layout—Inner Side (3rd Layer)
Figure 4. Bottom View (4th Layer)